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CVE PROGRAM SOURCE RECORDUnscored

CVE-2020-0574

Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclo

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Status
Published
Published
Updated
Assigning organization
intel

Description

Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.

Affected products

Version statuses are supplied by the assigning organization. Consult the original record for detailed ranges and platform conditions.

Intel Intel(R) MAX(R) 10 FPGA

  • All versionsaffected
  • See advisory https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.htmlaffected

References