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CVE PROGRAM SOURCE RECORD1.0 Low

CVE-2025-54515

The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors (TF-A) for Arm’s Power State Coordination Interface (PSCI) commands were incorrectly set

Description

The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors (TF-A) for Arm’s Power State Coordination Interface (PSCI) commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were from processors in the secure state instead of the non-secure state.

Affected products

Version statuses are supplied by the assigning organization. Consult the original record for detailed ranges and platform conditions.

AMD Versal™ Adaptive SoC Devices

Default version status: affected

  • 2025.2unaffected

AMD Versal™ RF Series

Default version status: affected

  • 2025.2unaffected

AMD Versal™ AI Edge Series

Default version status: affected

  • 2025.2unaffected

AMD Versal™ Prime Series

Default version status: affected

  • 2025.2unaffected

AMD Versal™ Premium Series

Default version status: affected

  • 2025.2unaffected

AMD Versal™ AI Core Series

Default version status: affected

  • 2025.2unaffected

AMD Versal™ HBM Series

Default version status: affected

  • 2025.2unaffected

AMD Alveo™ V80 Compute Accelerator

Default version status: affected

  • 2025.2unaffected

References