Description
In the Linux kernel, the following vulnerability has been resolved: spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the start RX buffer. The core provides a register that will empty the RX and TX FIFOs, so do that before each transfer.
Affected products
Version statuses are supplied by the assigning organization. Consult the original record for detailed ranges and platform conditions.
Linux Linux
Default version status: unaffected
9ac8d17694b66d54b13e9718b25c14ca36dbebbd to < 3feda3677e8bbe833c3a62a4091377a08f015b80affected9ac8d17694b66d54b13e9718b25c14ca36dbebbd to < 45e03d35229b680b79dfea1103a1f2f07d0b5d75affected9ac8d17694b66d54b13e9718b25c14ca36dbebbd to < 9cf71eb0faef4bff01df4264841b8465382d7927affected
Linux Linux
Default version status: affected
6.0affected0 to < 6.0unaffected6.6.44 to ≤ 6.6.*unaffected6.10.3 to ≤ 6.10.*unaffected6.11 to ≤ *unaffected