Description
Improper re-initialization of IOMMU during the DRTM event may permit an untrusted platform configuration to persist, allowing an attacker to read or modify hypervisor memory, potentially resulting in loss of confidentiality, integrity, and availability.
Affected products
Version statuses are supplied by the assigning organization. Consult the original record for detailed ranges and platform conditions.
AMD AMD EPYC™ 7003 Series Processors
Default version status: affected
MilanPI 1.0.0.Bunaffected
AMD AMD EPYC™ 9004 Series Processors
Default version status: affected
Genoa 1.0.0.8unaffected
AMD AMD EPYC™ Embedded 7003 Series Processors
Default version status: affected
EmbMilanPI-SP3 1.0.0.7unaffected
AMD AMD EPYC™ Embedded 9003 Series Processors
Default version status: affected
EmbGenoaPI-SP5 1.0.0.3unaffected